Various semiconductor devices employing silicon crystals are used widely. To enhance mobility of an electron that runs through a silicon crystal make performance of such a semiconductor device enhance effectively.
However, since the upper limit of the mobility of an electron that runs through a silicon crystal depends on the physical characteristic of a silicon crystal, any change in the structure of a semiconductor device can't change the proper mobility that the silicon crystal has own. Nevertheless, it is reported that the mobility of an electron can be enhanced in a strained silicon crystal that is obtained by straining a usual silicon crystal.
Generally the strained Si layer is produced by growing a thin silicon crystal layer, whose thickness is thinner than the thickness that the crystal is lattice relaxed, on a crystal having a lattice constant that is slightly different from the lattice constant of the silicon crystal. Typically, a SiGe alloy crystal layer whose Ge content is about 20% (where the lattice constant of the SiGe crystal is larger by about 0.8% than the lattice constant of the silicon crystal) is provided as an underlying layer, and then the thin silicon layer having thickness of 100 nm or less on the SiGe layer.
However, because it is difficult to obtain an SiGe crystal substrate which is produced at an industrial large scale and which is not expensive but of a high quality, a silicon wafer is usually employed as a substrate and an SiGe layer is grown by a vapor phase growth on the silicon wafer to a thickness lattice-relaxed (critical film thickness). So, it can obtain a lattice-relaxed SiGe underlying layer.
Nevertheless, Since in this method the SiGe crystal layer whose Ge content is about 20% grows on the Si substrate directly, a lot of defects such as the dislocation that is yielded when the SiGe crystal layer is lattice-relaxed become nucleuses that make the dislocation penetrate to a strained silicon layer growing thereon.
In an attempt to prevent the defects in a SiGe layer upon the lattice relaxation, a buffer layer is formed between a silicon substrate and a lattice-relaxed SiGe layer. Such buffer layer is generally a sufficiently thick SiGe layer having the composition similar to the lattice-relaxed SiGe layer (similar lattice constant) or a gradient SiGe layer having the composition Ge to gradually increase to the lattice-relaxed SiGe layer.
However, since total thickness of the buffer layer and the lattice-relaxed SiGe layer is extremely thick layer, it may make following process difficult. For example, in a case where the devices are integrated, fine devices should be separated from each other, but a SiGe layer having a thickness of 1 .mu.m or more is too thick to separate the devices from each other. Also in an SOI (silicon-on-insulator) technology expected to be capable of reducing the junction capacity, since a SiGe layer (combined with the buffer layer) having a thickness of 1 .mu.m or more is too thick, it makes junction capacity of a device increase.
Thus, it is difficult to obtain a satisfactory strained Si layer unless a thick lattice-relaxed SiGe layer is formed in combination with a buffer layer, so it is difficult to separate devices and to decrease the junction capacity of a device.